Forum Discussion
RRomano001
Contributor
6 years agoHi, your issue are on your design not on tool.
These error are related to your instance assigning pin to VCC, output vector 3 downto 0 is 4 element on output where 5 element..
VHDL has nothing wrong, so it can work, assign pin by pin planner or if you prefer bdf, remove VCC from a and connect where this has to be.
Not Quartus related. Please don't flood topic have nothing to do here, is better on vhdl forum.