Quartus bus notation issue

Question

https://www.alteraforum.com/forum/attachment.php?attachmentid=9082

http://i.imgur.com/YdzZoVt.png

I'm trying to keep the cleanliness of naming inputs and outputs for multiple, identical chips with bus notation but I want D6 and D7 to be the values indicated in red. How would I do that without having to go back to the sloppy way of making 4 different 74151 chips?

altera_forum · Answer

If I understand you correctly, you are just trying to create another bus, with 3 bits from rega and the 4th bit set to gnd?

You can use the "wire" primitive you allow you to create D6 from individual bits of another bus, and connect 1 bit to GND.

Can I just ask, why the use of graphics? and why use the 74 primitives? not the lpm_mux?

Forum Discussion

Quartus bus notation issue

1 Reply

Recent Discussions

No access to the Self Service Licensing Center (SSLC)

recovery timing issue

Duplicate_hierarchy_depth / duplicate_register

Unable to download Quartus

how to reduce clock skew between synchronous clock