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Altera_Forum
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11 years ago

Quartus bus notation issue

https://www.alteraforum.com/forum/attachment.php?attachmentid=9082 http://i.imgur.com/YdzZoVt.png I'm trying to keep the cleanliness of naming inputs and outputs for multiple, identical chips ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

If I understand you correctly, you are just trying to create another bus, with 3 bits from rega and the 4th bit set to gnd?

You can use the "wire" primitive you allow you to create D6 from individual bits of another bus, and connect 1 bit to GND.

Can I just ask, why the use of graphics? and why use the 74 primitives? not the lpm_mux?