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The AHDL approach seems to be ok, while the VHDL approach shows unexplainable spikes.
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These spikes aren't unexplainable nor even a compiler bug. They are basically normal behaviour with an asynchronous decoder.
An interesting question is, why the VHDL variant is showing stronger glitches than the AHDL. Apparently, the synthesis is different. You should consider, that the delay skew of the AHDL "pinsCypressData" output lines can already cause problems when sampling the data with an unsuitable timing. In contrast, registering the decoded VHDL output can remove the glitches.
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