Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
18 years ago

Quartus 4.2 (full) vs Quartus 7.1 (web edition)

Hello! I've written a design for a Stratix EP1S10 device with fastest timing (-> C5) with Quartus II 7.1 Web Edition. It all works fine, both in simulation and reality. Now, I thought abou...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
18 years ago

Hi,

If you use embedded block RAM, also check that they are correctly inferred ant not implemented using LEs. If not, it could explain the timing degradation and LEs extra-usage.

BR.