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Without the block that changes player_1_pos, your design's output is constant.
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Yes, exactly.
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I guess I'll have to spread the work across several clock cycles.
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That's definitely the way to go. In addition, you should think about how to represent your frame buffer. Now it's a huge block of registers. I fear, that the design still won't fit a reasonable FPGA size, because a graveyard of multiplexers is required to access each framebuffer element, even with the presently used coarse resolution. In practice, an addressable memory, either external or internal RAM, is the only feasible way to design a frame buffer. It restricts frame buffer access to sequential methods, of course.
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