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Altera_Forum
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10 years ago

Quartus 12_Analysis and Synthesis Failed_Help

Hello,I am trying to create a simple RAM in my FPGA memory, and allow a microprocessor to read from the memory. I am attaching my code for the reference.I am getting the following error while compili...
Altera_Forum's avatar
Altera_Forum
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10 years ago

I agree with Cris72. After I read and understood the chapters "Recommended Design Practices" and "Recommended HDL Coding Styles" of the Quartus II handbook (volume 1) I was able to avoid considerable waste of FPGA resources. I'm gradually able to predict what hardware will be generated by various statements and found that helps a lot.