Quartus 10: Warning: TRI or OPNDRN buffers permanently disabled Warning

Hi all,

I am compiling a heavily modified version of the Verilog Boilerplate for the Technology Systems TS7300 Board using Quartus II 10.0 Build 262 (running on an Ubuntu 10.04.1 machine).

The project compiles and works properly on the FPGA.

In order to have a good starting point for future projects, I cleaned up the whole project and tried to get rid of as many synthesis warnings as possible.

Unfortunately, I can't get rid of this one:

Warning: TRI or OPNDRN buffers permanently disabled

Node "irq7_pad~synth"

The only two appearances of the irq7_pad are the output definition in the very beginning

output                irq7_pad;

and an assign statement.

assign      irq7_pad = ( usercore_irq ) ? 1'b1 : 1'bz;

Having googled this issue, I found the following remark on the Altera Website:

--- Quote Start ---

problem

warning: tri or opndrn buffers permanently enabled

solution

This message may occur when Quartus® II integrated synthesis inserts an always-enabled tri-state buffer feeding logic that drives a pin designated in the source code as inout (bidirectional) and the pin is used only as an output.

You can safely ignore these warnings in this case, or you can eliminate the message by restructuring the source code so that the inout pin is declared as an output pin.

The warning messages may be improved in a future version of the Quartus II software.

--- Quote End ---

Moreover, I found a threat in the Altera forum, which in my opinion basicly states the same.

It seems to me like the suggested solution doesn't apply here since the pin is already defined as an output-only pin.

Please let me know if you got any ideas or if I got the whole situation wrong.

Many thanks!

Jonas Lindmann