Honored ContributorHello. At Altera Quartus Prime Standard Edition Settings FileReference Manual in some descriptions i found a "Technology Mapper option". Where in the application can I find these settings? I need this to implement some elements on ROM instead of LUT.
Honored ContributorChosing the mapping can be done with attributes in HDL - but this will only work if the logic is suitable. Why not post the code so we have some idea of whether it will work.
As a note though, Quartus will generally use Memory elements when it can, and only use LUTs if necessary. If it didnt default to RAM, there is probably an issue with the code.Honored Contributor
library IEEE;
use IEEE.STD_LOGIC_1164.all;
use IEEE.numeric_std.all;
entity ROM_ent is
port(
Q : in STD_LOGIC_VECTOR(5 downto 0);
Y2 : out STD_LOGIC_VECTOR(1 to 3)
);
TYPE Base IS ARRAY (50 DOWNTO 0) OF STD_LOGIC_VECTOR(1 TO 3);
constant ROM: Base := (
0 => "000",
1 => "110",
2 => "000",
3 => "011",
................
50 => "000");
end ROM_ent;
architecture ROM_ent of ROM_ent is
signal addr_u : unsigned(5 downto 0);
signal addr : natural range 0 to 50;
begin
addr_u <= unsigned(Q);
addr <= to_integer(addr_u);
Y2 <= ROM(addr);
end ROM_ent;
It wont use internal memory, as it is asynchronous code. Asynchronous ROMs can only be generated with LUTS. To use memory elements, you must make the code synchronous.
