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Altera_Forum
Honored Contributor
13 years agoBTW, My problem turned out to be a bad board.
My SRAM interface is working on a good board. The SSRAM comes up in asynchronous mode so the interface is a simple addr/data/cs/we/be/oe set of signals. As far a sharing goes. I used the name of the largest bus. I shared the Flash address name since the flash required 26 bits while the SRAM only required 23, whereas I shared the SRAM data bus name since it is a 32-bit bus while the flash is only 16.