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Altera_Forum
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12 years ago

Qsys problem in connecting Avalon-MM master and slave with different symbol widths

hi, i cannot connect avalon-mm master with a symbol width of 8 and avalon-mm slave with a symbol width of 9. i am trying to connect a 128-bit width master with 8-bit symbol of a clock crossing ...
Altera_Forum's avatar
Altera_Forum
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12 years ago

Hi,

After all, I knew that I still had a problem of the QDRII+ controller.

I connected the 64-bit read/write Avalon-MM ports of the QDRII+ controller to BAR2 of PCIe core. The PCIe core works correctly.

However, the QDRII+ core operates incorrectly.

At every address, the least significand 4 bits in the 64 bits are always "0000", while the remaining 60 bits match the written 60 bits.

All the four QDRII+ SRAM @ 500MHz on Terasic DE5-NET board have the same problem.

We configured different DE5-NET boards with the same bit stream, they also had the same problem.

I carefully made settings on the QDRII+ core based on the sample design by Terasic...

Can anyone help me?

Many thanks,

Micky