Forum Discussion
Altera_Forum
Honored Contributor
12 years agoHi, thanks.
I also think that your LPDDR2 case is similar to my QDDRII case. In the current design, it is okay to use 16 pins from 18 pins of QDRII memory. I tried to do this, but the width of the external pins to memory cannot be changed (with the symbol width). The value of "18" is fixed, and cannot be changed... What I am trying is to export AvalonMM bus with symbol width of 8, and connect the exported ports of Qsys module to QDRII controller generated by MegaFunction Wizard. If you have any other advices, please help me. Micky