Open Side Menu
Skip to contentBrand Logo
Forums
BlogKnowledge BaseAltera.com
RegisterSign In
  1. Altera Community
  2. Forums
  3. Quartus® Prime

Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

qsys, Pcie Ip Compiler

hi there

can i configure pcie ip compiler to work in Gen2.0 with 4 lanes (in Qsys) ?

i'm using stratix Iv gx
No RepliesBe the first to reply

Recent Discussions

  • hl2026's avatar
    Tensor block usage
    47 minutes ago
    hl2026
  • MADesigner's avatar
    When you double click on a word, the other instances do not highlight due to the Find Box being open
    8 hours ago
    MADesigner
  • dpcsu's avatar
    jtagserver.exe causing BSOD together with ftdi driver
    13 hours ago
    dpcsu
  • FvM's avatar
    Automatically added negative node for TDS output doesn't work with Agilex 5
    14 hours ago
    FvM
  • dpcsu's avatar
    Agilex3 - unknown IDCODE
    16 hours ago
    dpcsu
Contact Us
Altera YoutubeAltera YoutubeAltera Twitter
  • Company Overview
  • Newsroom
  • Our Leaders
  • Careers
Subscribe to Altera Newsletter

© Altera Corporation | Terms of Use | Privacy Policy | Cookies | Trademarks | PSIRT

Altera Logo