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Altera_Forum's avatar
Altera_Forum
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9 years ago

Qsys, How do you determine the Address for an Avalon-MM Block?

Ok, so I've managed to compile my SoC block with Qsys, I had some prior error but it was due to not setting the TOP module correctly. Now it's compiled and I even managed to add some LEDs sign...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

So far I've found some errors in my FPGA design, such routing the wrong CLK nets. ( side note: who does the default template for the development board and duplicates the clock nets and instantiates the wrong ones in the top level module?!?!)

But still I'm getting segmentation faults when trying to write the memory at the specified address! At least now I don't get kernelpanics! yey!