Forum Discussion
Altera_Forum
Honored Contributor
14 years agoI searched further in my code, and yes it is in the code (as it (999 out of a 1000 times) always is ...). To do the deletion of the lines I split the read source VHDL file into a list of lines and then ran through each one deciding to append it it another list. Here I got caught by the 'persistence' of Tcl variables. I declared that list as a variable. The Qsys generation process calls my generation routine in the same 'context' and as a result I appended the new source to an existing list holding all previously appended lines. So I now declared an empty list -> problem solved. I attach the modified Tcl code for the interested readers.