Qsys component assignments

I've sucesfully created a custom Qsys component composed of a bunch of VHDL files and a SDC file for timing constraints. Now I would like to also add a number of assignments (set_instance_assignment -name XXX ... ) to the component. I've already tried to add a qsf file to the custom component's file list but the assignments don't seem to be applied, altough the qsf file is copied to the synthesis directory together with the VHDL and SDC files. Is that possible, or should I embedd the assignments inside the VHDL via attributes?