QSYS and symbols

This is a very disappointing thread. I had hoped to find solutions, but apparently there are none!

I just started playing with the new Qsys tool, and was at first impressed with how easily it converted my SOPC design. The GUI was even very similar to SOPC Builder, so it took no time at all to be ready to generate a new processor system. But then I opened up my Quartus schematic again and was appalled! The block it generated is practically unusable. If it is as randomly generated as it appears to be from the comments in this thread, I have no intention of mangling my schematic to fit a processor block that may change significantly the next time I edit the peripherals anyway.

Thankfully the SOPC Builder tool is still included with V11.0, so I intend to continue using that. It looks like Altera still has their work cut out for them to make Qsys as user-friendly as SOPC Builder before expecting anyone to switch tools (other than those that switch by necessity due to the few technical enhancements...but as far as I can tell that really only applies to the minority right now).