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Altera_Forum's avatar
Altera_Forum
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15 years ago

Qsys - simple design not working

Hi,

I am not able to get this simple system working on Qsys.

However it works when I re-enter it with SOPC.

I am using Q11.0 and my hardware is Cyclone II.

This is what I do:

Generate the Qsys/SOPC file.

In Nois application I build the .elf file.

Then I do an elf2hex conversion.

I replace the .hex memory initialisation file for the Qsys/SOPC.

I am able to verify uptill this stage and all is fine.

In Quartus I update MIF and assemble.

A comparison of the output files (.sof/.rbf) does not make sense to me.

When I configure the Cylcone II hardware, SOPC works, but Qsys dosent.

I tried various setting but still could not get it up.

Could it be a BUG or am I missing something.

Any help is greatly appreciated.

4 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    15 years ago

    Connect Instruction Master bus and use proper vector assignment in cpu options in QSYS.

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    15 years ago

    Guru,

    I tried adding a custom instruction module (bit swapper) and tied the dangling stub. Blead for another half a day but still no results.

    I had worked earlier on cyclone IV with Qsys with no problems. But on Cyclone II the NIOS is deadbeef.

    Unable to bleed any further I have resorted to SOPC. It is a pain to export conduits, but no other go...

    My inference is Qsys does not work on Cyclone II !!

    Ravi
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    15 years ago

    I see that You've edited the system and now it probably doesn't work, because Your reset polarity is inverted. You use reset_n signal as system reset.

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    14 years ago

    I faced the similar problem.i use Qsys to build a custom instruction to counter the clk number if i input '1',while input '0' to clear the counter ,but when i generate the system,error comes like this:Error: nios2_qsys_0: Port no_ci_readra in TCL description is not found in the design file

    can you do me a favor？