Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

Qsys - No output on anlayze synthesis files

I am having a strange problem in that QSYS is not outputing any messages when trying to run the Analyze Synthesis Files on a custom component.

This is what it looks like on a successful synthesis:

https://www.alteraforum.com/forum/attachment.php?attachmentid=9265

This is what it looks like on an unsuccessful synthesis:

https://www.alteraforum.com/forum/attachment.php?attachmentid=9267

On a collegue's computer running the exact same installation version his output for the exact same files looks like this on a successful synthesis:

https://www.alteraforum.com/forum/attachment.php?attachmentid=9268

and on a bad synthesis:

https://www.alteraforum.com/forum/attachment.php?attachmentid=9269

The fact that I am getting no output at all is making finding my errors very difficult. Including the fact that I have one component that synthesizes fine in quartus standalone, but then fails when I try to bring it into QSYS.

This problem was originally seen on 13.1, but I have tried uninstalling and reinstalling quartus, problem persists.

I tried moving to 14.0, problem persists.

This problem shows up on three different machines that I have tried it on, including one that had never seen quartus before.

I have tried uninstalling quartus, scrubbing the registry of all entries "Altera", "Quartus", or "qsys", then reinstalling, problem persists.

There must be a setting buried somewhere, anyone have any idea what might be going on here?

Thanks in advance.

3 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    10 years ago

    I am also experiencing a similar problem in Qsys 15.0 Build 153. In particular, i cannot get a successful "Analyze synthesis files" operation to occur, and i get the same output as "not_working_fail.bmp" above... Absolutely no information to assist me identify what the problem is. My VHDL files synthesis and simulate correctly, and yet for some reason, QSYS Component Editor will not analyse those files.

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    10 years ago

    It might be helpful to run Qsys with "--debug" switch: it'll provide more verbose log.

    Just open Qsys in command line:

    <quartus installation>/quartus/sopc_builder/binq/sys-edit --debug

    Thanks,

    Evgeni
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    8 years ago

    I have absolutely the same problem!

    Windows 8.1(64 bit) + quartus 13.1, 15.1 and 17.0.2.602

    Also I tryed to install windows 10 + quartus 17.0.2.602 on clean HDD.

    I tryed to run qsys with "--debug", all that i see in "Analyzing Synthesis Files" window is (ALL Info strings are empty):

    Debug: set ALTERA_HW_TCL_KEEP_TEMP_FILES=1 to retain temp files

    Debug: Command: C:/intelfpga_lite/17.0/quartus\bin64/quartus_sh.exe -t C:/Users/Dima/AppData/Local/Temp/alt7388_7658326834931209417.dir/0004_sopcqmap/not_a_project_setup.tcl

    Debug: Command: C:/intelfpga_lite/17.0/quartus\bin64/quartus_map.exe not_a_project --generate_hdl_interface=C:/altera-309/zander_main/canc/hdl/can_acf.v --set=HDL_INTERFACE_OUTPUT_PATH=C:/Users/Dima/AppData/Local/Temp/alt7388_7658326834931209417.dir/0004_sopcqmap/ --ini=disable_check_quartus_compatibility_qsys_only=on

    Info:

    Debug: Command took 2.191s

    Info:

    Debug: Command took 1.520s