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Altera_Forum's avatar
Altera_Forum
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18 years ago

Pull Down

Hi, someone knows a way to force with quartus the FPGA outputs with a pull down? It's very important for me to have some pin set to 0 at the start, but without forcing them externaly.... Thanks
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
18 years ago

I guess that you need to add some vhdl code to drive them '0' and "drive" them

to Z after a certain amount of time (counter).