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Sorry I must have got distracted and forgot to answer those. I'm looking at the design example that comes with the SoC EDS and I can see the pin settings for the HPS I/O in the assignment editor. It'll be rather limited but you can set options like the drive strength of the HPS I/O for example.
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Sorry I'm being stupid - but I just can't find it - I've searched the
altera soc embedded design suite user guide and the
cyclone v handbook but I didn't find anything that tells me how to set the drive strength for HPS I/Os...
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There is a notion of pin muxes in the HPS that reside between HPS peripherals and the HPS I/O. So when you make selections of the peripherals in the HPS component and decide which pin set to use, files are generated that the bsp-editor pulls in to determine how your pin muxes should be setup to route the peripherals to their appropriate HPS I/O. The HPS I/O also have settings like input/output/bidirectional, drive strength, etc... which is determined by your peripheral routing selection as well as I/O constraints you set in Quartus. The I/O settings are also handed off to the bsp-editor so that when the bootloader is generated the correct I/O settings can be programmed into the I/O. Both of these are automated so you shouldn't have to worry about anything except selecting what peripherals and locations you want, generate and compile the hardware and then the bootloader generator (bsp-editor) will take it from there.
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Thanks BadOmen!
Honored Contributor
