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Altera_Forum
Honored Contributor
13 years agoYes, you have to add pull resistor, check if your programmer need that target CPLD is powered before programming.
example schematic (http://elecfreaks.com/store/download/datasheet/dev%20platform/fpga/epm240.pdf) Connecting Vio and Vint together is ok, check if there are enough decoupling capacitor