Forum Discussion
Altera_Forum
Honored Contributor
11 years agoThink about the logic you're trying to describe. Your j loop just does the same thing 3 times (it doesnt do anything different on each iteration) and the t loop adds between 0 and 4 to the count variable.
I think you need to start again. Before writing any code, draw the circuit you are trying to achieve on a peice of paper. VHDL is a description language, not a programming language. If you dont know the circuit, how do you expect to describe it?