Problems with ModelSim

Question

Hi all,   I have started having problems simulating with ModelSim.   My quartus II project compiles successfully but either ModelSim opens and I get the following message, and another error if I try to compile my testbench:   #  Reading C:/altera/10.0/modelsim_ase/tcl/vsim/pref.tcl #  do FIFO_With_LVDS_PARRALLEL_run_msim_rtl_vhdl.do #  if {} {#   vdel -lib rtl_work -all#  }#  ** Warning: (vdel-133) Unable to remove directory "U:\FTDI-Morph-IC-II_trial_With_DEMUX\simulation\modelsim\rtl_work".#  The directory is not empty.#  #  . (GetLastError() = 145)#  vlib rtl_work#  ** Error: (vlib-35) Failed to create directory "rtl_work".#  File exists. (errno = EEXIST)#  vmap work rtl_work#  Copying C:\altera\10.0\modelsim_ase\win32aloem/../modelsim.ini to modelsim.ini#  Modifying modelsim.ini#  ** Warning: Copied C:\altera\10.0\modelsim_ase\win32aloem/../modelsim.ini to modelsim.ini.#           Updated modelsim.ini.#  #  vcom -93 -work work {U:/FTDI-Morph-IC-II_trial_With_DEMUX/Morph_USB_LOOPBACK.vhd}#  Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010#  -- Loading package standard#  -- Loading package std_logic_1164#  -- Compiling entity morph_usb_loopback#  ** Fatal: Unexpected signal: 11.#  ** Error: U:/FTDI-Morph-IC-II_trial_With_DEMUX/Morph_USB_LOOPBACK.vhd(58): VHDL Compiler exiting#  ** Error: C:/altera/10.0/modelsim_ase/win32aloem/vcom failed.#  Error in macro ./FIFO_With_LVDS_PARRALLEL_run_msim_rtl_vhdl.do line 8#  C:/altera/10.0/modelsim_ase/win32aloem/vcom failed.#      while executing#  "vcom -93 -work work {U:/FTDI-Morph-IC-II_trial_With_DEMUX/Morph_USB_LOOPBACK.vhd}"
 
   Or I get an error which is something like    posix einval {invalid argument}   Even when I go back to previous designs that I have simulated before modelSim still isn't opening properly.... any ideas?   Cheers, Lee H

altera_forum · Answer

Hi,

1st proposition :

try to manually delete rtl_work directory.

and run your macro again.

2nd proposition :

Have you tried to "manually" compile your vhdl files ?

I mean without macro.

File>Add exisisting file to project...

Menu compile>compile order>auto generate

FIFO_With_LVDS_PARRALLEL_run_msim_rtl_vhdl.do is just a text file written in "limited" tcl language. You can open it with a text editor.

altera_forum · Answer

--- Quote Start ---

Hi,

1st proposition :

try to manually delete rtl_work directory.

and run your macro again.

--- Quote End ---

Hi Tsuchi, I have already manually tried to delete the rtl_work directory and I always get the error message "cannot remove folder rtl_work: the directory is not empty." I can't remember attempting to manually delete this directory before, but as it contains 0 files and 3 folders and each of these folders are empty I can't understand why I can't delete them, even if I turn read only off... the next time I look at properties it says read only again!? I don't know whether this is from Quartus or ModelSim or whether I have a bug somewhere...

--- Quote Start ---

2nd proposition :

Have you tried to "manually" compile your vhdl files ?

I mean without macro.

File>Add exisisting file to project...

Menu compile>compile order>auto generate

FIFO_With_LVDS_PARRALLEL_run_msim_rtl_vhdl.do is just a text file written in "limited" tcl language. You can open it with a text editor.

--- Quote End ---

As for trying to manually compile the VHDL files, I havn't looked into this yet but will give it a go.

Cheers,

Lee H

altera_forum · Answer

--- Quote Start ---

Hi Tsuchi, I have already manually tried to delete the rtl_work directory and I always get the error message "cannot remove folder rtl_work: the directory is not empty." I can't remember attempting to manually delete this directory before, but as it contains 0 files and 3 folders and each of these folders are empty I can't understand why I can't delete them, even if I turn read only off... the next time I look at properties it says read only again!? I don't know whether this is from Quartus or ModelSim or whether I have a bug somewhere...

--- Quote End ---

Maybe, there are hidden (and system) files.

altera_forum · Answer

--- Quote Start ---

Maybe, there are hidden (and system) files.

--- Quote End ---

Hmmm I have hidden files turned on anyway... and there don't appear to be any system or hidden files in those folders. They are just behaving a bit odd.

I have played around with a few things and have noticed that my "rtl_work" library that among the files that should be there but aren't my rtl_work library has disappeared, which is causing problems when trying to manually compile the program.

I know we had a virus on the network yesterday at work, but I have done a complete scan and my machine seems clear, but wonder whether this stuff was done before the antivirus update?

Basically my biggest thing now is how to I go about generating a new rtl_work library etc. when I am getting an error saying nativelink flow was NOT successful etc????

any ideas how to reproduce the missing files?

altera_forum · Answer

Just wanted to say thanks for your thoughts...

Turned out it was something to do with the virus in the end, I was getting lockout of certain files and couldn't access them. After IT reset the server then everything went back to normal and simulates again now...

Cheers,

Lee H

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Problems with ModelSim

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