Altera_Forum
Honored Contributor
17 years agoProblems setting up LVDS on CycloneIII
Hi there,
I'm trying to set up a 16x2 bit LVDS connection with a CycloneIII device. The actual model I'm using is the EP3C16Q240C8N. First, I'm verifying my config in the Quartus pin planner. For this, my design only contains a simple LVDS block I made with the MegaWizard. Up till now, I've have found 2 problems in the pin planner: - When I assign a LVDS signal to pin 7, which is a diff pin in bank 1, I get this error: error: the transmitter driving i/o pin outdata[0] at data rate 839 mbps exceeds the maximum allowed data rate of 640 mbps for lvds output Although the CycloneIII handbook clearly states on page 8-3 that banks 1,3,5,6 should support speeds of up to 840MHz! How come Quartus complains the device can only work at max 640MHz? This would be so uncool! Even my grandma can transition at higher speeds. - No problem, I changed the megawizard to 640Mbps. Next problem: I cannot use pins of bank 1 for LVDS, because I cannot change its voltage to 2.5V! "error: pin outdata[0] is incompatible with i/o bank 1. it uses i/o standard lvds, which has vccio requirement of 2.5v. that requirement is incompatible with bank's vccio setting or other output or bidirectional pins in the bank using vccio 3.3v." There's no way I can change the VCCIO for bank 1 in the pin planner, although I can alter the VCCIO for the other banks. This is most likely caused because the config device needs to be connected to that bank. So I went to the device configuration options, but there NO WAY to set the VCCIO of bank 1 to 2.5V. While I definately need a serial config device in my design ... They specifically designed bank 1 for hi-speed LVDS, but it isn't compatible with LVDS voltages ??? So 2 questions: - How to get 840Mbps out of banks 1,2,5 and 6? - How to make bank 1 work with LVDS? Any help is MUCH appreciated! Riemer