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Altera_Forum's avatar
Altera_Forum
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12 years ago

Problems inferring memory for Arria V

Hello With my transition from Startix III to Arria V, i thought it to be a good idea to have my block memory inferred instead of instantiated/MegaWizzard generated for better portability. My id...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

VHDL fileio isnt' supported in Quartus, Verilog $readmemb and $readmemh works.

For true dual port memory port inference, you can follow the Quartus language templates, accessible in the editor context menu.