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Altera_Forum's avatar
Altera_Forum
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10 years ago

Problem with while loop in an array

I need to check how many cells in an array are "filled" and how many are zeroed. The array is a one-dimensional array of 64 bits vector. Declaration in package: package my_pack is typ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

Thank you.

1. Wouldn't a while loop be more efficient? True, it's only 18 iterations, but if I can make them 10 iterations, for example, wouldn't it be better?

2. Any reason why it wouldn't be synthesizable? VHDL supports while loop, and it's a small loop made to determine a number.

3. Would also love an answer for the final post edit question :)