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xor, not, etc are reserved words, so you cannot call your components those names. I also think and2 is an altera primative, so you probably cant use that either. You need to call in the altera primitives library.
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How I can call Altera primitives library in VHDL? Or i can't use built-in primitives in VHDL code never altogether?
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But why the aversion to using the and, xor etc functions?
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It is not adversion - it is only educational tasks. I read VHDL specification but I can't found information about using Altera Quartus II built-in primitives in VHDL code?
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But my VHDL code work in Xilinx ISE, because Xilins ISE has other names for built-in gates (see screenshot in attachment) and for gate-ports (I0,I1,O instead IN1,IN2,OUT).
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