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Altera_Forum's avatar
Altera_Forum
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12 years ago

Problem with SV Interfaces in Quartus

This will be a contrived example to illustrate a point. I'll start from an incredibly simple module design that does nothing but hold output pins in a constant pattern. module fpga_tester( ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

Try using mod ports. Just like modules you need ports or modports to drive or source from the registers inside the interface block. I think the simulator allows you to reference a logic type with hierarchical reference but not sure of Quartus.