Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

Problem about SignalTab II

Hi, Can I use the SignalTab II to check the waveform of some output ports or registers when I debug my codes in Nios II IDE 5.1? Thanks.
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

What is important is this: Though SignalTap And NIOS Debug both require JTAG and their operations must be mutually exclusive, they check for different things when they communicate over JTAG. SignalTap checks for the correct hardware image before acquiring the data. IDE checks for sysid (if you included it in SOPC system) and for the h/w image. So, The caveats in this experiment are following:

1. You cannot have continuous run of Signal Tap (i.e. Auto mode) when you are in Debug mode of NIOS.

2. Running the NIOS in debug mode will stop the processor momentarily. If you have a NIOS signal as trigger in SignalTap, this can cause a problem.

3. Program the FPGA through SignalTap and NOT through the Programmer.