Preserving WYSIWYG LUT input assignments

I realize that I will need to control both the routing and the LUT inputs to have any chance of meeting my target, which is path lengths that are matched to within about 100ps. In the previous generation of this design, I first locked down the LUTs and then used the back-annotation results to control placement and coax the router into using identical types of routing between the cells. In that case (Stratix I) I was able to match path lengths to within about 200ps.

Since I haven't yet placed any routing constraints on the design, I'm not sure why the fitter is ignoring my specified inputs on the WYSIWYG cells. These are in a reserved LogicLock region that has very low utilization (less than 20% of the ALMs). Given that each ALM only has 3 inputs and one output I would expect the routing density to be very low as well. I know that, even so, by constraining the LUT inputs I can create a non-routable design, but it seems to me that the fitter isn't even trying to preserve the LUT input assignments since about 90% of them are getting remapped.

Any ideas on how to get the fitter to stop doing this remapping?

Jeff