Forum Discussion
Altera_Forum
Honored Contributor
8 years agoUnrolling a loop should certainly not change the output. If your output is different in emulation compared to actual FPGA execution, then it is likely a bug in the compiler (and in rare cases, some bug in the BSP).
Just to make sure, can you remove all instances of "constant" from your code and let the variables be defined as a standard float and see what happens? Assuming that it doesn't fix your problem, you can try opening a service request with Altera. Of course the issue might have already been fixed in the newer versions of the compiler, but I understand that you cannot use them since Terasic have not updated their BSP yet. P.S. Are you using Windows? The last time I checked, Terasic's v16.1 BSP was completely broken on Linux.