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Altera_Forum's avatar
Altera_Forum
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16 years ago

Power Analysis

Hi,

Let's say my design doesnt fit in the fitter due to excessive IO pins. Is there any other way I can check on the power consumption of my design?

cheers,

clare

4 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    16 years ago

    Open the Assignment Editor and list a bunch of your pins. Then make the assignment Virtual Pin = On to them. This will make the I/O become internal registers, so the design can now fit and you can do a power analysis.

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    16 years ago

    thanks Rysc but i still have problem the design cannot fit in fitter. i got the following error message:

    Error: Selected device has 52 RAM location(s) of type M4K. However, the current design needs more than 52 to successfully fit

    Info: List of RAM cells constrained to M4K locations

    I
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    16 years ago

    You can right-click on a hierarchy and create a Design Partition. Then go to Assignments -> Design Partition viewer and make it an Empty partition. Everything that hooks up to it will be kept but the contents of that hierarchy will be empty. This is a way to remove logic, but of course the power numbers will be slightly less, and if the final design needs that much memory, it's not a valid solution. It just works for quick tests.