Poll: Do you want the internal simulator back?

Check post# 28 ... (and perhaps als# 37)

You can simulate AHDL source with ModelSim using 'Gate Level' simulation. You have Quartus II write out a .vho netlist file in VHDL format and simulate that with ModelSim. As it is Gate Level Simulation it runs slower than RTL Simulation, but it will still be quicker than the internal Quartus II simulator. You also have to take care of proper setup and hold ties for your input signals, but if you are doing a functional test a not too fast clock will ease things. After a while you will enjoy the power of testbenches.