Poll: Do you want the internal simulator back?

i'd be interested to know whether the bigger loss is the ability to draw test benches, or the actual simulator itself

It surely is the ease of waveform editing that we want back. How the simulator does it is anyway beyond us. I imagine Altera could have kept the waveform editor/viewer, generate a testbench from that, run any simulator in the background, read the results and display it. I guess this is what our friends with Xilinx do?

I understand that the old simulation environment was easier for teaching purposes. You start with something 'simple' and don't need to explain test bench during the first lesson.

I welcome any reducion of the number of tools we use and focus on the most practical ones. In particular the mini simulators of altera or xilinx are useless. They may help quick debug of code but are no good for proper testing in an industrial environment.

I was taught VHDL at university (BCU Birmingham City Uni) England using Quartus 9.1 last year; I have managed to get a job in the electronics industry at a company that uses Lattice - and model sim. I have been trying to get the company to convert to Altera as it HAD easier / superior simulation interface for expedient proof of concept software design entry, now I have come back to Altera after using lattice, and I can’t find any advantage to using Altera over Lattice, your simulation software was the major trump card - it allowed me to simulate quickly and get stuff done, now I’m going to have to learn some new stuff, this is really disappointing Altera, and as such, we are not going to be using your products. Please can you email me if you decide to put the internal simulator back into your software?

I agree with josyb that at a minimum the waveform viewer/editor should remain.

I think everyone here would agree that anything larger than a "small" design requires a more advanced simulator (i.e. ModelSim). There is no doubt there. But why then does a small design have to suffer the same rigors of a larger design when it comes to simulation/verification. I happen to like the old internal simulator for easy and quick verification.

I use Quartus for an introductory digital logic course I teach. I had to go back to 9.1 after realizing that the simple simulator was missing. I understand that a real testbench is the "safest" way to go, but it is really beyond students who are just learning the fundamentals of logic design. After we breadboard a few discrete logic designs, I have my students work through Altera's Quartus tutorial, and that uses the built-in simulator. Then they simulate everything and use an Altera DE2 FPGA board for all subsequent labs (again, nothing more complicated than adders, multipliers, counters and FSMs). BTW, the removal of the LPM functions breaks some of my course content as well.