PLL Reconfiguration Fails when built using Quartus v13.1

This change allowed me to dynamically phase shift two clocks from a PLL in a stripped down version of my design. But when I try this in my complete design, I can change only one of the two clocks. Additionally, which clock I can change depends on how I use those clocks in my design. Not completely obvious, but it seems the clock that drives more logic doesn't get the dps capability.

Something else that is weird, I do not see the quartus.ini in my project folder anymore? @mvanpelt, do you see the quartus.ini in your project folder. We use CVS so, I happen to close quartus and delete the project folder quite a bit.