please help me about avering of array at 1 clc pulse

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wheres the testbench code?

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I create only two .vhd files. I sent the first one. and this is the second one. I got it wrong?

LIBRARY ieee;

USE ieee.std_logic_1164.all;

use ieee.std_logic_unsigned.all;--std_logic_vector operasyonlarina izin verir.--std_logic_vector'e aritm. islemler uygulamayi saglar

use ieee.std_logic_unsigned;

--use ieee.numeric_std.all;

PACKAGE my_data_types IS

TYPE integer_array IS ARRAY(0 TO 5,0 TO 5) OF integer range 0 to 255;

TYPE int_arr_out IS ARRAY (0 TO 3,0 TO 3) OF integer range 0 to 255;

END my_data_types;