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you question doesnt make any sense. Can you post some code with specific problems?
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I can send my code but there is no error while compilation and
simulation.So I can send all my code to be clear.
I couldn't see output values on simulation report. I couldn't understand.
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;--cevirmeler yapabilecegim icin kullanmak zorundayim.
use ieee.std_logic_unsigned.all;--std_logic_vector operasyonlarina izin verir.--std_logic_vector'e aritm. islemler uygulamayi saglar
USE work.my_data_types.all;--package'i dahil etmek icin kullandim.
--use ieee.std_logic_arith;--conv. islemler icin
use ieee.numeric_std;
ENTITY projem2 IS
GENERIC (
n : INTEGER := 4
);
PORT( clk : IN STD_LOGIC;
we : in std_logic;
--matris_in : IN integer_array;
finish : OUT bit;
--deneme : OUT bit;
matris_out : out int_arr_out
);
end projem2;
architecture behv of projem2 is
SIGNAL matris_in :integer_array :=((0,0,0,0,0,0), (0,25,69,54,30,0), (0,215,14,3,98,0), (0,51,150,117,200,0), (0,100,13,82,9,0), (0,0,0,0,0,0));
SIGNAL s1,s2,s3,s4,s5,s6,s7,summary : unsigned(7 downto 0);
SIGNAL counter : INTEGER;
--SIGNAL matris_out :int_arr_out;
SIGNAL tmp3: integer;
SIGNAL tmp2: unsigned(7 downto 0);
SIGNAL tmp4: unsigned(7 downto 0);
SIGNAL tmp5: unsigned(7 downto 0);
TYPE state IS (st0,st1,st2,st3,st4,st5,st6,st7,st8);
SIGNAL pr_state,nx_state: state;
--bir hafıza alanı olusturulmali...büyük bir matris için kullanilirken.
--type ram_t is array( 0 to 15) of std_logic_vector( 15 downto 0);
--variable rama : ram_t;
function divide (a : UNSIGNED; b : UNSIGNED) return UNSIGNED is
variable a1 : unsigned(a'length-1 downto 0):=a;
variable b1 : unsigned(b'length-1 downto 0):=b;
variable p1 : unsigned(b'length downto 0):= (others => '0');
variable i : integer:=0;
begin
for i in 0 to b'length-1 loop
p1(b'length-1 downto 1) := p1(b'length-2 downto 0);
p1(0) := a1(a'length-1);
a1(a'length-1 downto 1) := a1(a'length-2 downto 0);
p1 := p1-b1;
if(p1(b'length-1) ='1') then
a1(0) :='0';
p1 := p1+b1;
else
a1(0) :='1';
end if;
end loop;
return a1;
end divide;
signal a : unsigned(7 downto 0) ;
signal b : unsigned(7 downto 0) ;
signal c : unsigned(7 downto 0) :=(others => '0');
function adder (A,B : in integer) return unsigned is --integer degerler 8 bit olcagi icin (7 DOWNTO 0)kullandım.
variable tmp : unsigned(7 downto 0);
variable SUM : unsigned(7 downto 0);
begin
tmp := conv_unsigned(A,8) + conv_unsigned(B,8) ;
Sum := tmp(7 DOWNTO 0);
--SUM:=tmp2 (7 DOWNTO 0);
return SUM; -- return olan deger std_logic_vector tipinde!!!
end adder;
BEGIN
PROCESS(clk,we)
BEGIN
if(we='1') then
pr_state <=st0;
elsif(clk'event and clk = '1') then
pr_state <= nx_state;
end if;
END PROCESS;
PROCESS(pr_state,counter)
BEGIN
counter <= 0;
--deneme1<='1';
FOR i IN 1 TO n LOOP
FOR j IN 1 TO n LOOP
counter <= 1;
CASE pr_state IS
WHEN st0 =>
IF(counter = 1) THEN
s1<=adder(matris_in(i-1,j-1),matris_in(i-1,j));
--deneme2<='1';
counter<=counter + 1;
nx_state <= st1;
end if;
WHEN st1 =>
IF(counter = 2) then
s2<=adder(conv_integer(s1),matris_in(i-1,j+1));
counter<=counter + 1;
nx_state <= st2;
end if;
WHEN st2 =>
IF(counter = 3) THEN
s3<=adder(conv_integer(s2),matris_in(i,j-1));
counter<=counter + 1;
nx_state <= st3;
--deneme3<=counter;
end if;
WHEN st3 =>
IF(counter = 4) THEN
s4<=adder(conv_integer(s3),matris_in(i,j));
counter<=counter + 1;
nx_state <= st4;
end if;
WHEN st4 =>
IF(counter = 5) THEN
s5<=adder(conv_integer(s4),matris_in(i,j+1));
counter<=counter + 1;
nx_state <= st5;
end if;
WHEN st5 =>
IF(counter = 6) THEN
s6<=adder(conv_integer(s5),matris_in(i+1,j-1));
counter<=counter + 1;
nx_state <= st6;
end if;
WHEN st6 =>
IF(counter = 7) THEN
s7<=adder(conv_integer(s6),matris_in(i+1,j));
counter<=counter + 1;
nx_state <= st7;
end if;
WHEN st7 =>
IF(counter = 8) THEN
summary<=adder(conv_integer(s7),matris_in(i+1,j+1));
counter<=counter + 1;
nx_state <= st8;
end if;
WHEN st8 =>
IF(counter = 9) THEN
tmp4<=conv_unsigned(9,8);
tmp5<=conv_unsigned(1,8);
c <= divide ( tmp5 , tmp4 );
tmp3<=(conv_integer(summary)* conv_integer(c));
tmp2<=conv_unsigned(tmp3,8);
matris_out(i-1,j-1)<=conv_integer(tmp2);
--counter<=counter+1; --???
--finish<='1' WHEN (i =n AND j = n) ELSE '0';
--deneme<=tmp2; -- yeni degeri ekranda gormek icin
end if;
if (i= n AND j=n ) THEN
finish<='1';
end if;
END CASE;
end loop;
end loop;
end process;
end behv;
At this code I try to make average filter on a matrix(matris_in which is 6*6 matrix).matris_out is a output matrix(4*4). Values which are averaged of matris_in,is saved at matris_out.
matris_in is6*6.Because I apply zero padding to a 4*4 matrix.
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