Forum Discussion

Aswinkrishnan's avatar
Aswinkrishnan
Icon for Occasional Contributor rankOccasional Contributor
3 years ago
Solved

Platform Designer BFM simulation

Hi I have been learning FPGA development for past few months. Now I have started using platform designer. I could generate an IP, do all the connections and generate HDL in VHDL. When I tried runn...
  • ShengN_altera's avatar
    ShengN_altera
    3 years ago

    Hi @Aswinkrishnan ,

    One more thing is have you follow the BFM simulation steps of avlmm_2x2_vhdl in the screenshots below?:

    Best regards,
    Sheng

    p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 4/5 survey.

Aswinkrishnan's avatar
Aswinkrishnan
Icon for Occasional Contributor rankOccasional Contributor
3 years ago

Thank you for that. I have been trying out that zip files and in that I was mainly understanding avlmm_2x2_vhdl. When I tried to run the simulation on the test bench in Questa, the warnings shown are

1. component instance "dut : avlmm_avls_2x2" is not bound.

2. component instance "tp : test program is not bound.

There is no simulation running. Are these errors due to libraries or something else?


For your reference, I am using Quartus prime standard 21.1 version.

ShengN_altera's avatar
ShengN_altera
Icon for Super Contributor rankSuper Contributor
3 years ago

Hi @Aswinkrishnan ,

One more thing is have you follow the BFM simulation steps of avlmm_2x2_vhdl in the screenshots below?:

Best regards,
Sheng

p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 4/5 survey.

  • Aswinkrishnan's avatar
    Aswinkrishnan
    Icon for Occasional Contributor rankOccasional Contributor
    3 years ago

    Hi

    Thanking you for all the answers now. The program seems to be working perfectly.

    I was going through the test program to understand the format and the commands that are being used to communicate with the bus. The questions I have are

    1. Are those commands in the test program global? that is it could be used for writing any other simulation models?

    2. Are there any pdf or resources that lists all the commands, writing a bus functional model test bench?

    To understand the concept of BFM in whole, I was looking for simulating a counter module. I could use it as the slave device and control it using the master. Hence, does the test program can be used as a reference for any further examples.

    Regards

    Aswin