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Occasional Contributor

1 year ago

Solved

Placement constraints for PLL in QPP

There is the feature called as logic lock which can fix placement of a node, I want to know if it is possible to use logic lock for fixing position of PLL? I get a warning in plan stage of fitter as "...

Hdl

AqidAyman_Altera
1 year ago
You can choose "Location" for that version of Quartus Prime.

AqidAyman_Altera

Regular Contributor

1 year ago

Hi,

I don't think that is the correct cmd in the qsf that relates with the PLL placement.

You can check Assignment Editor. From there, you can choose the PLL pin --> choose Placement in the Assignment Name --> choose the PLL that locate in the same bank with the reference clock.

https://www.intel.com/content/www/us/en/programmable/quartushelp/current/index.htm#assign/ase/ase_com_assign_ed.htm

Pack_of_lone_wolves
Occasional Contributor
1 year ago
There's no "Placement" option in the assignment name drop-down. QPP 20.1

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Placement constraints for PLL in QPP

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