Altera_Forum
Honored Contributor
12 years agoPipeline latency
Suppose I would like to know how many cycles deep is my kernel pipeline. Is this information readily available from any .log file generated by AOCL? Thank you,
I use the report to get all the information I need when I'm turning a kernel. The use model of the OpenCL compiler is that you don't need to worry about the pipeline depth because it will already be tuned to ensure that enough work-items are in flight to keep the pipeline full.
That clock that is 2x the kernel clock is used to double pump RAMs to essentially make the dual port RAMs function as quad port RAMs.