Performing a timing simulation with Stratix II device family.

Hi,

Sorry for the delay, but I finally found a DDR2 design example. I believe that this design example targetted a StratixIIGX device and a Micron model.

I have attached my_design.zip for your reference. Currently, you can run the simulation using Modelsim-Altera 6.1g by following these steps:

1) Unzip the zip file to a location on your hard drive

2) Start up the Modelsim-Altera 6.1g software

3) In Modelsim-Altera, go to the file menu -> change directory -> and browse to the "<location where you unzip the .zip file>\simulation\modelsim", and click ok

4) Go to the Tools menu -> execute macro -> run.do

This should setup the simulation automatically for you if you run the script "run.do". I hope this helps!

FYI, I had to delete a bunch of files so that I would meet the maximum size attachment. Let me know if there are some file's missing, I can find those files and attach it for you if you are unable to run the simulation.

-pld_wizzard