Seadog
Occasional Contributor
2 years agoPCIe example design generation fails
Trying to generate a PCIe endpoint example design (QPP 18.1.0, Stratix 10 1SX085HN2F43I2VG), getting an error:
Error: add_fileset_file: No such file C:/Users/My.Name.Here/AppData/Local/Temp/alt9571_2686104493968254145.dir/0002_pcie_s10_hip_avmm_bridge_0_gen/ip/pcie_example_design/pcie_example_design_DUT/altera_pcie_s10_hip_avmm_bridge_181/sim/aldec/altera_pcie_s10_64avmm_adapter/altera_pcie_s10_adapter_rx.v/altera_pcie_s10_adapter.v
I am aware of the issue regarding path length:
(https://www.intel.com/content/www/us/en/support/programmable/articles/000087662.html),
and I had that problem addressed by the local IT folks. But I am still getting the same error.
Is there another workaround for this?
Thanks.