Honored Contributor
Honored ContributorIt's a synchronous load, so if it's high when the clock rises, your parallel data will be latched in. Depending on which direction you are shifting, either bit 0 or bit 5 (your inputs 1 and 6) will appear on the serial output and the subsequent clocks will shift out the rest. I'm not sure without checking, but there might be a delay between the load and your first data bit appearing at the output. Also, I'm not sure where the serial output will settle after your last data bit is shifted out. If this matters, add the 'serial in' port to your megafunction and tie it high or low. You could frame your data in UART fashion by adding some extra bits either side of your data bits and tying them high and low as required.
The best thing to do is read the Quartus built-in help for this function. Look under 'megafunctions' in the index. Then play with it. To me that's half the fun.
