Parallel adder timing issues

For something like an adder, I would just start coding it in HDL and seeing what happens. If there's something you can't do in HDL, or that doesn't get synthesized the way you want, then megafunctions tend to be better. But an adder should be no problem.

Are you using the Classic Timing Analyzer or TimeQuest? Since you put 6.604ns TCO, I'm guessing you're using the Classic Timing Analyzer and looking at the delay to an output pin. When benchmarking small functions like this, make sure you're looking "inside the registers". Users often wrap these functions with registers just to make sure. Your I/O timing will be another matter that should be looked at independently, where I'm guessing in your scenario you have a fast adder, and are then looking at the timing on this last register to get out an output pin, which is not what you want to analyze for this function.