Honored ContributorHi all,
I have a counter that counts up every time an input of '1' is seen. At the max count value a flag should output '1' and the count resets. I can achieve this, however the output lasts for as long as the input stays at '1' on the final count. How do you code for an output to last for just one clock cycle? Thanks
Honored Contributoryou wanted count to go from 0 to 255 and back, yet you are asking if count > 255 which will never occur in your new code.
Here is code for my understanding of your plans earlier in your post
entity counter is
port (clk : in std_logic;
on_input : in std_logic;
reset : in std_logic;
overflow : out std_logic;
values : out integer range 0 to 255);
end counter;
architecture Behavioral of counter is
signal count : integer range 0 to 255;
signal on_input_d: std_logic := '0';
begin
process (clk, reset)
begin
if reset = '1' then
count <= 0;
on_input_d <= '0';
elsif rising_edge (clk) then
on_input_d <= on_input;
if on_input = '1' and on_input_d = '0' then
count <= count + 1;
end if;
end if;
end process;
process (count)
begin
if count = 255 then
overflow <= '1';
else
overflow <= '0';
end if;
end process;
values <= count;
end Behavioral;Hey! Thanks for that it worked a treat! And I understand how it works. A real help, thank you!
