OpenCL + Cyclone V SoC

Hello Jim and everybody

I'm facing the same problem :-(

I have seen Altera has included "beta support" for cvsoc but it is not documented at all. I have compiled host side driver for cvsoc (no pkg_editor.h header so reprogram app is commented out in Makefile). I put the module (aclsoc_drv) in my altera_cvsoc kit and "insmoded" it. Everything seems to be ok until the driver tries to register an IRQ

This is my dmseg output

aclsoc_init (826):

----------------------------<7>

aclsoc_init (827):

Driver version: 13.1.1<7>

aclsoc_probe (705):

acl_board_id is 4, ACL_PCI_CRA_BAR is 0, PAGE_SIZE is 4096<7>

init_chrdev (130):

aclsoc = 251:0<7>

mapped region 0 (lw) to [c0a80000, c0aa0000). Size = 131072

mapped region 2 (lw) to [c0a00000, c0a40000). Size = 262144

mapped ffc25000 to c0a60000

Writing 0x3fff to offset 0x80

Writing 0x0 to offset 0x7c

Setting applycfg bit to 1

ALT_SDR_CTL_CTLCFG_OFST = 0xa8c42

ALT_SDR_CTL_CTLWIDTH = 0x2

ALT_SDR_CTL_PORTCFG = 0x0

ALT_SDR_CTL_FPGAPORTRST = 0x3fff

ALT_SDR_CTL_REMAPPRIORITY = 0x0

ALT_SDR_CTL_CPORTWIDTH = 0x44000

ALT_SDR_CTL_CPORTWMAP = 0x2c000000

ALT_SDR_CTL_CPORTRMAP = 0xb00000

ALT_SDR_CTL_WFIFOCMAP = 0x980000

ALT_SDR_CTL_RFIFOCMAP = 0x760000

fpga_mgr mapped to c08e8000, fpga_mgr_data mapped to c08ea000

init_irq (288):

aclsoc = bf043c00<7>

init_irq (289):

get_interrupt_enable_addr = c0a04050<7>

init_irq (305):

Could not request IRQ# 72, error -22<7>

After failing to register the IRQ, the module remains in memory but the /dev/acl entry is not created. No test to try :-)

Is Altera going to document cvsoc CL support in 13.1 or we have to wait for other version/service pack?

Thanks In Advance

Having RTFM more carefully I've made a bit of progress. I've added this:

export AOCL_BOARD_PACKAGE_ROOT=$ALTERAOCLSDKROOT/board/c5soc

which results in this:

$ aoc --list-boards
Board list:
  c5soc
$ make
/usr/bin/ld: skipping incompatible /home/jim/altera/13.1/hld/board/c5soc/host/arm32/lib/libalteracl.so when searching for -lalteracl
/home/jim/altera/13.1/hld/board/c5soc/host/arm32/lib/libalterahalmmd.so: could not read symbols: File in wrong format
collect2: ld returned 1 exit status
make: ***  Error 1
$ cd device
$ aoc hello_world.cl --board c5soc
Error: aoc: Can't find a valid license for the Altera SDK for OpenCL

I've also now read about the LM_LICENSE_FILE environment variable, but since I'm using the web edition of Quartus I don't have a license.dat. Is there any way of experimenting with this stuff on a Cyclone V without buying a Stratix V license?

Hi,

Please set the environment variable AOCL_BOARD_PACKAGE_ROOT to point to the local folder or

directory of your desired target board, such as ALTERAOCLSDKROOT/board/<board_family>. More details can be found in the Getting Started documentation.

--- Quote Start ---

5. [jim@development device]$ aoc hello_world.cl --board pcie385n_a7

Error: aoc: Can't find a valid license for the Altera SDK for OpenCL

--- Quote End ---

Do you have a valid license and have you set it in Quartus?

Thanks for your suggestions Sean. My own comments seem to be getting stuck in moderation, which makes the conversation rather stilted!

I eventually read the right manual, and have successfully implemented your first suggestion. I don't have any licence as far as I'm aware, since one is not necessary for using Quartus web edition with Cyclone V. http://www.altera.com/download/licensing/setup/lic-setup-q2webedition.html tells me:

--- Quote Start ---

Beginning with version 8.1, a license file is no longer required for this or future versions of Quartus® II Web Edition software.

--- Quote End ---

It seems the same does not apply when using OpenCL with the Cyclone V?

Hi all again

I have managed to make /dev/acl to pop up. I thought the driver created it dynamically (alloc_chrdev_region->class_create->device_create) but aclsoc_load script showed me I was wrong. After "mknodding" the entry /dev/acl was ready. Then I run "user" program and it segfaults during mmap test.

This is "user" program output

...

root@socfpga:~/AOCL/host/driver# ./user

Opened the device: file handle# 3!

Wrote 19, read back 19

ua[0] = 0, ub[0] = 0

ua[1] = 13, ub[1] = 13

ua[2] = 26, ub[2] = 26

ua[3] = 39, ub[3] = 39

ua[4] = 52, ub[4] = 52

ua[5] = 65, ub[5] = 65

ua[6] = 78, ub[6] = 78

ua[7] = 91, ub[7] = 91

ua[8] = 104, ub[8] = 104

ua[9] = 117, ub[9] = 117

test_small_writes PASSED

Done test_page_write with 12288 bytes

Segmentation fault

...

And dmesg output...

...

aclsoc_open (145):

aclsoc = bf1be800, pid = 8285 (user)<7>

aclsoc_contig_alloc: asked for 7340032, allocating 8388608 bytes

ibuf = 0, buf = bcc00000, cur_size = 4194304

ibuf = 1, buf = bbc00000, cur_size = 4194304

Allocation failed. Freeing buffers from 1 to 0 inclusive

aclsoc_mmap (629):

Remapping 7340032 bytes. Got (null) from allocator.

aclsoc_close (191):

aclsoc = bf1be800, pid = 8285, dma_idle = 1<7>

...

By the way. Driver can be successfully loaded (no IRQ problems) if you change IRQ from 72 to another number (I tried 70 and it worked)

...

aclsoc_init (826):

----------------------------<7>

aclsoc_init (827):

Driver version: 13.1.1<7>

aclsoc_probe (705):

acl_board_id is 4, ACL_PCI_CRA_BAR is 0, PAGE_SIZE is 4096<7>

init_chrdev (130):

aclsoc = 251:0<7>

mapped region 0 (lw) to [c0e80000, c0ea0000). Size = 131072

mapped region 2 (lw) to [c0e00000, c0e40000). Size = 262144

mapped ffc25000 to c0e60000

Writing 0x3fff to offset 0x80

Writing 0x0 to offset 0x7c

Setting applycfg bit to 1

ALT_SDR_CTL_CTLCFG_OFST = 0xa8c42

ALT_SDR_CTL_CTLWIDTH = 0x2

ALT_SDR_CTL_PORTCFG = 0x0

ALT_SDR_CTL_FPGAPORTRST = 0x3fff

ALT_SDR_CTL_REMAPPRIORITY = 0x0

ALT_SDR_CTL_CPORTWIDTH = 0x44000

ALT_SDR_CTL_CPORTWMAP = 0x2c000000

ALT_SDR_CTL_CPORTRMAP = 0xb00000

ALT_SDR_CTL_WFIFOCMAP = 0x980000

ALT_SDR_CTL_RFIFOCMAP = 0x760000

fpga_mgr mapped to c08f8000, fpga_mgr_data mapped to c08fa000

init_irq (288):

aclsoc = bf1bf400<7>

init_irq (289):

get_interrupt_enable_addr = c0e04050<7>

init_irq (308):

Succesfully requested IRQ# 70<7>

....

root@socfpga:~/AOCL/host/driver# cat /proc/devices

Character devices:

1 mem

2 pty

3 ttyp

4 /dev/vc/0

4 tty

4 ttyS

5 /dev/tty

5 /dev/console

5 /dev/ptmx

7 vcs

10 misc

13 input

89 i2c

90 mtd

128 ptm

136 pts

153 spi

180 usb

189 usb_device

251 acl

252 ttyLCD

253 rtc

254 fpga

....

root@socfpga:~/AOCL/host/driver# cat /proc/interrupts

CPU0 CPU1

29: 1571586 1571346 GIC twd

70: 0 0 GIC aclsoc_drv

152: 8612 0 GIC eth0

160: 1 0 GIC dwc_otg, dwc_otg_hcd:usb1

171: 110332 0 GIC dw-mci

183: 0 0 GIC ff705000.flash

190: 22 0 GIC ffc04000.i2c

194: 35 0 GIC serial

201: 17 0 GIC timer

207: 0 0 GIC fpga-mgr

IPI0: 0 0 CPU wakeup interrupts

IPI1: 0 0 Timer broadcast interrupts

IPI2: 26080 25744 Rescheduling interrupts

IPI3: 0 0 Function call interrupts

IPI4: 2 2 Single function call interrupts

IPI5: 0 0 CPU stop interrupts

Err: 0

Next steps, anyone? :-)

Thanks In Advance

--- Quote Start ---

I don't have any licence as far as I'm aware, since one is not necessary for using Quartus web edition with Cyclone V. http://www.altera.com/download/licensing/setup/lic-setup-q2webedition.html tells me:

It seems the same does not apply when using OpenCL with the Cyclone V?

--- Quote End ---

I'm not certain, but OpenCL and/or Cyclone V devices may require a license at the moment. Since DSP Builder says it requires a license, it makes sense that OpenCL would as well since they're both HLD tools. You may wish to check this with your local FAE.

--- Quote Start ---

Having RTFM more carefully I've made a bit of progress. I've added this:

export AOCL_BOARD_PACKAGE_ROOT=$ALTERAOCLSDKROOT/board/c5soc

which results in this:

$ aoc --list-boards
Board list:
  c5soc
$ make
/usr/bin/ld: skipping incompatible /home/jim/altera/13.1/hld/board/c5soc/host/arm32/lib/libalteracl.so when searching for -lalteracl
/home/jim/altera/13.1/hld/board/c5soc/host/arm32/lib/libalterahalmmd.so: could not read symbols: File in wrong format
collect2: ld returned 1 exit status
make: ***  Error 1
$ cd device
$ aoc hello_world.cl --board c5soc
Error: aoc: Can't find a valid license for the Altera SDK for OpenCL

I've also now read about the LM_LICENSE_FILE environment variable, but since I'm using the web edition of Quartus I don't have a license.dat. Is there any way of experimenting with this stuff on a Cyclone V without buying a Stratix V license?

--- Quote End ---

Hello Jim

You are trying to compile/link arm code using x86 tools. First of all you have to install linaro tool chain for cross-compiling arm apps in x86. Mine is in /opt/altera-linux.

1) Modify your PATH environment

export PATH=$PATH:/opt/altera-linux/linaro/gcc-linaro-arm-linux-gnueabihf-4.7-2012.11-20121123_linux/bin/

2) Modify Makefile to use arm toolchain

...

# OpenCL compile and link flags.

AOCL_COMPILE_CONFIG := $(shell aocl compile-config)

AOCL_LINK_CONFIG := $(shell aocl link-config)

# Cross compiling stuff

CROSS_COMPILE = arm-linux-gnueabihf-

...

$(ECHO)$(CROSS_COMPILE)g++ $(CXXFLAGS) -fPIC $(foreach D,$(INC_DIRS),-I

$(AOCL_COMPILE_CONFIG) $(SRCS) $(AOCL_LINK_CONFIG) \

$(foreach D,$(LIB_DIRS),-L$D)

$(foreach L,$(LIBS),-l$L)

...

Just make and that's all.

This is the easy part. There are some steps missing

1) Generate FPGA kernel .aocx using aocl (I don't have an AOCL lic yet :-( )

2) Get a working device driver running in arm host. I can compile and insmod the host driver (arm) but it cannot pass the tests (see my last post)

I think we need support from Altera people (Dimitry Denisenko is the author of the host side driver ...)

Good luck

Thanks for your suggestions eyguacel,

After a rather frustrating Saturday afternoon I now have yet another flavour of embedded ARM Linux on my hard drive! The RocketBoards Linaro SD image seems to function OK on my SoCKit, but their git server also seems to be non-functional at the moment. I've been using the toolchain that came with the Altera version of ARM DS-5 from /opt/altera/13.1/embedded/DS-5/bin, although I had to build my own mkimage. I eventually found what looks to be a clone of the RocketBoards repo, and did this:

git clone git://support.criticallink.com/home/git/linux-socfpga.git
cd linux-socfpga
git checkout socfpga-3.8
make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- socfpga_defconfig
make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- LOADADDR=0x8000 uImage

I replaced the uImage on the SD card with my new one (which did of course kill my nice LXDE desktop), and built the driver and hello_world following your instructions. Where is pkg_editor.h hiding do you suppose?

Transferring that lot to the SD card as well revealed this:

root@localhost:~# ./aclsoc_load
./aclsoc_load: 21: [: 251: unexpected operator
root@localhost:~# ls /dev/acl
/dev/acl
root@localhost:~# ./hello_world
Reprogramming was successful!
FPGA is in user mode. Enabling bridges
sh: 1: cannot create /sys/class/fpga-bridge/fpga2hps/enable: Directory nonexistent
sh: 1: cannot create /sys/class/fpga-bridge/hps2fpga/enable: Directory nonexistent
sh: 1: cannot create /sys/class/fpga-bridge/lwhps2fpga/enable: Directory nonexistent
PCIe-MMD Fatal: Version mismatch, expected a0c7c1e0 but read 0
hello_world: acl_pcie_device.cpp:217: ACL_PCIE_DEVICE::ACL_PCIE_DEVICE(ACL_PCIE_BOARD*, int): Assertion `.
Aborted
root@localhost:~#

Does anyone from Altera pop in here on a regular basis to assist? I don't know if this is good form or not, but I've sent them a "Service Request". I have yet to receive a reply however.

As I mentioned at the top of the thread, I'm new to all things Altera. I've seen the SoC publicity, and gained the impression that it's possible to evaluate all their development tools free of charge on "entry level" hardware. Maybe that doesn't apply to OpenCL, or maybe it's an inadvertent "feature" that's easily fixed?

My previous comment is still held in moderation, but here's a PS - http://www.rocketboards.org/foswiki/documentation/gsrdreleasenotes

According to this November 21st post on RocketBoards:

--- Quote Start ---

CV SoCFPGA GSRD has been updated to ACDS13.1 code base using ACDS13.1 tools and software release.

AV SoCFPGA GSRD has been created, and it has the same set of software features as CV SoCFPGA GSRD.

This Linux BSP release supports the CycloneV SoC Development Kit, and provides the following for the CycloneV SoC:

Linux kernel v3.9

Drivers: I2C, LCD, EEPROM, RTC, Ethernet, USB (Host), Watchdog, SD/MMC, QSPI, DMA, FPGA Manager, and FPGA Bridges

Boards: Cyclone V DevKit Rev C.

U-Boot 2013.01

Linaro's GCC 4.7 2012.11

--- Quote End ---

It looks like that is what I need to investigate next!