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Honored Contributor
Honored ContributorOn-Chip Memory in Qsys/Quartus
I have a design based on an Arria II GX part in which Qsys is utilized to generate a system made up of many different interfaces, other components and IP in the design. This system implements a PCIe...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- The software team reports that they are using the 0x28000 offset into the memory. --- Quote End --- Ok, that looks correct then. I'd suggest using Signal Tap II on the Avalon side of BAR0; that way you can see what the read commands look like (byte-enables etc) and the returned read data. Even better would be a simulation with a PCIe bus functional model, but Altera's support for the PCIe BFM was removed after version 11.0 Cheers, Dave
