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Altera_Forum
Honored Contributor
8 years agoThank you for ur reply,
here is my code, it should be enough to test it --- Quote Start --- --main process p_main: process (clk, rst_n) variable seed1, seed2 : positive; variable rand : real; variable int_rand : integer range 0 to 1000; variable counter, count_hash, num_test: integer; variable line_in, line_out : line; variable temp: std_logic_vector(63 downto 0); file filein : text open read_mode is "c:\users\simo\Desktop\Keccak_core\new_test_vector/keccak_in.txt"; file fileout : text open write_mode is "c:\users\simo\Desktop\Keccak_core\new_test_vector/keccak_out_compact_vhdl.txt"; begin if rst_n = '0' then -- asynchronous rst_n (active low) st <= initial; counter:=0; din<=(others=>'0'); count_hash:=0; init<='0'; absorb<='0'; squeeze<='0'; go<='0'; rand_num <= 1; elsif clk'event and clk = '1' then -- rising clk edge uniform (seed1, seed2, rand); int_rand := INTEGER(TRUNC(rand*1000.0)); int_rand := int_rand; report "random is :" & integer'image(int_rand) severity NOTE; --is not random at each execution --- Quote End ---