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Altera_Forum's avatar
Altera_Forum
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11 years ago

not able to see the output on the oscilloscope

Hello everyone,

I have programmed my FPGA De0 nano board to generate short pulse of 1000 ps and the time between the next pulse is 10 us. I want to see this pulse on digital oscilloscope. I have made all the connection from the DE0 board to the scope. is it possible to see the pulse on the scope. If possible, how can i achieve it?

Thanks,

amod

7 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    11 years ago

    Hi amod,

    I think the first thing to check is to run a Modelsim simulation to ensure your design function as expected. Then cross check on the pin out. You may send some clock pattern to see if scope capture it. Then only use your pattern.
  • Altera_Forum's avatar
    Altera_Forum
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    11 years ago

    Hi nic,

    I have done that. able to see the simulation output. But not able to see the short pulse on the scope.
  • Altera_Forum's avatar
    Altera_Forum
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    11 years ago

    Your scope have enough bandwidth and triggers are set right?

  • Altera_Forum's avatar
    Altera_Forum
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    11 years ago

    Can you share your design? Even LVDS transmitter on the best speed grade device makes only 420 MHz. The other interfaces are way slower than LVDS. How you are trying to achieve one Gigahertz?

  • Altera_Forum's avatar
    Altera_Forum
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    11 years ago

    You're not going to be able to generate the 1GHz clock needed for a 1ns pulse on a DE0-Nano. The max output frequency of the PLL is 472.5MHz. Your oscilloscope's not going to see something that isn't there.

    Cheers,

    Alex
  • Altera_Forum's avatar
    Altera_Forum
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    11 years ago

    DE0-Nano is with CIV E device. As Alex said, the max PLL output frequency for CIV E device is 472.5MHz only. Even if you are using LVDS, the max data rate is 840Mbps only.